During the past fifty years, the electronics and computing industries have been relentlessly propelled forward by the ever decreasing sizes of basic electronic components, such as transistors and signal lines, and by the correspondingly ever increasing component densities of integrated circuits, including processors and electronic memory chips. Eventually, however, it is expected that fundamental component-size limits will be reached in semiconductor-circuit-fabrication technologies based on photolithographic methods. As the size of components decreases below the resolution limit of ultraviolet light, for example, far more technically demanding and expensive higher-energy-radiation-based technologies need to be employed to create smaller components using photolithographic techniques. Not only must expensive semiconductor fabrication facilities be rebuilt in order to use the new techniques, many new obstacles are expected to be encountered. For example, it is necessary to construct semiconductor devices through a series of photolithographic steps, with precise alignment of the masks used in each step with respect to the components already fabricated on the surface of a nascent semiconductor. As the component sizes decrease, precise alignment becomes more and more difficult and expensive. As another example, the probabilities that certain types of randomly distributed defects in semiconductor surfaces result in defective semiconductor devices may increase as the sizes of components manufactured on the semiconductor services decrease, resulting in an increasing proportion of defective devices during manufacture, and a correspondingly lower yield of useful product. Ultimately, various quantum effects that arise only at molecular-scale distances may altogether overwhelm current approaches to component construction in semiconductors.
In view of these problems, researchers and developers have expended considerable research effort in fabricating microscale and nanoscale electronic devices using alternative technologies, where nanoscale electronic devices generally employ nanoscale signal lines having widths, and nanoscale components having dimensions, of less than 100 nanometers. More densely fabricated nanoscale electronic devices may employ nanoscale signal lines having widths, and nanoscale components having dimensions, of less than 50 nanometers.
Although general nanowire technologies have been developed, it is not necessarily straightforward to employ nanowire technologies to miniaturize existing types of circuits and structures. While it may be possible to tediously construct miniaturized, nanowire circuits similar to the much larger, current circuits, it is impractical, and often impossible, to manufacture such miniaturized circuits. Even were such straightforwardly miniaturized circuits able to feasibly manufactured, the much higher component densities that ensue from combining together nanoscale components necessitate much different strategies related to removing waste heat produced by the circuits. In addition, the electronic properties of substances may change dramatically at nanoscale dimensions, so that different types of approaches and substances may need to be employed for fabricating even relatively simple, well-known circuits and subsystems at nanoscale dimensions. Thus, new implementation strategies and techniques need to be employed to develop and manufacture useful circuits and structures at nanoscale dimensions using nanowires.
With the ability to selectively fabricate simple electronic components, including transistors, resistors, diodes, and other simple components, at molecular-junction-nanowire crossbar points, it becomes desirable to combine selectively fabricated electrical components to produce useful electronic circuitry, including latches, flip-flops, and other such circuits. Designers, manufacturers, and users of microelectronic devices and integrated circuits have thus recognized the need for nanoscale implementations of familiar electronic circuitry. Unfortunately, the current methods by which such circuitry is fabricated are not amenable to simple miniaturization using nanowire-based structures similar to those currently employed at larger dimensions. Instead, designers, manufacturers, and users of devices that include such circuitry have recognized the need for new methods for implementing familiar electronic circuitry that are useable at nanoscale dimensions. Moreover, to facilitate reuse and flexibility of this circuitry, designers, manufacturers, and users of devices that include the circuitry have recognized the need for reprogrammable circuits that can be reconfigured for alternative uses or to enhance the devices in which they are included.